NXP Semiconductors ColdFire MCF52235 Bedienungsanleitung

MCF52235 ColdFire®Integrated

Microcontroller Reference Manual

Devices Supported:

MCF52230

MCF52231

MCF52233

MCF52234

MCF52235

Document Number:

MCF52235RM

Rev. 0

04/2006

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Document Number: MCF52235RM

Rev. 0

04/2006

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

Freescale Semiconductor iii

Preliminary

Table of Contents

Chapter 1

Overview

1.1 MCF52235 Family Configurations ...................................................................................................2

1.2 Block Diagram ..................................................................................................................................2

1.3 Part Numbers and Packaging ............................................................................................................4

1.4 Features .............................................................................................................................................4

Chapter 2

Signal Descriptions

2.1 Introduction .......................................................................................................................................1

2.2 Overview ...........................................................................................................................................1

2.3 Reset Signals .....................................................................................................................................8

2.4 PLL and Clock Signals ......................................................................................................................8

2.5 Mode Selection ..................................................................................................................................8

2.6 External Interrupt Signals ..................................................................................................................8

2.7 Queued Serial Peripheral Interface (QSPI) .......................................................................................9

2.8 Fast Ethernet Controller PHY Signals ............................................................................................10

2.9 I2C I/O Signals ................................................................................................................................10

2.10 UART Module Signals ....................................................................................................................11

2.11 DMA Timer Signals ........................................................................................................................11

2.12 ADC Signals ....................................................................................................................................11

2.13 General Purpose Timer Signals .......................................................................................................12

2.14 Pulse Width Modulator Signals .......................................................................................................12

2.15 Debug Support Signals ....................................................................................................................12

2.16 EzPort Signal Descriptions ..............................................................................................................13

2.17 Power and Ground Pins ...................................................................................................................14

Chapter 3

ColdFire Core

3.1 Processor Pipelines ............................................................................................................................1

3.2 Memory Map/Register Description ...................................................................................................2

3.3 Instruction Set Architecture (ISA_A+) .............................................................................................8

3.4 Exception Processing Overview ........................................................................................................8

3.5 Exception Stack Frame Definition ..................................................................................................10

3.6 Processor Exceptions .......................................................................................................................11

3.7 Instruction Execution Timing ..........................................................................................................18

3.8 Standard One Operand Instruction Execution Times ......................................................................20

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Preliminary

3.9 Standard Two Operand Instruction Execution Times ......................................................................21

3.10 Miscellaneous Instruction Execution Times ...................................................................................22

3.11 EMAC Instruction Execution Times ...............................................................................................23

3.12 Branch Instruction Execution Times ...............................................................................................24

Chapter 4

Enhanced Multiply-Accumulate Unit (EMAC)

4.1 Multiply-Accumulate Unit ................................................................................................................1

4.2 Introduction to the MAC ...................................................................................................................2

4.3 General Operation .............................................................................................................................2

4.4 Memory Map/Register Definition .....................................................................................................5

4.5 EMAC Instruction Set Summary ....................................................................................................11

Chapter 5

Cryptographic Acceleration Unit

5.1 CAU Registers ...................................................................................................................................1

5.2 CAU Operation .................................................................................................................................2

5.3 CAU Commands ...............................................................................................................................2

5.4 CAU Equate Values ...........................................................................................................................7

Chapter 6

Random Number Generator Accelerator (RNGA)

6.1 Overview ...........................................................................................................................................1

6.2 Features .............................................................................................................................................2

6.3 Modes of Operation ...........................................................................................................................2

6.4 Memory Map/Register Definition .....................................................................................................3

6.5 Functional Description ....................................................................................................................11

6.6 Initialization/Application Information ............................................................................................12

Chapter 7

Clock Module

7.1 Introduction .......................................................................................................................................1

7.2 Features .............................................................................................................................................1

7.3 Modes of Operation ...........................................................................................................................1

7.4 Low-power Mode Operation .............................................................................................................2

7.5 Block Diagram ..................................................................................................................................2

7.6 Signal Descriptions ...........................................................................................................................4

7.7 Memory Map and Registers ..............................................................................................................5

7.8 Functional Description ....................................................................................................................11

Chapter 8

Real Time Clock

8.1 Introduction .......................................................................................................................................1

8.2 Memory Map/Register Definition .....................................................................................................2

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

Freescale Semiconductor v

Preliminary

8.3 Functional Description ....................................................................................................................12

8.4 Initialization/Application Information ............................................................................................13

Chapter 9

Power Management

9.1 Introduction .......................................................................................................................................1

9.2 Memory Map/Register Definition .....................................................................................................1

9.3 IPS Bus Timeout Monitor ...............................................................................................................10

9.4 Functional Description ....................................................................................................................11

Chapter 10

Reset Controller Module

10.1 Introduction .......................................................................................................................................1

10.2 Features .............................................................................................................................................1

10.3 Block Diagram ..................................................................................................................................1

10.4 Signals ...............................................................................................................................................2

10.5 Memory Map and Registers ..............................................................................................................2

10.6 Functional Description ......................................................................................................................5

Chapter 11

Static RAM (SRAM)

11.1 Introduction .......................................................................................................................................1

11.2 Memory Map/Register Description ...................................................................................................1

11.3 Initialization/Application Information ..............................................................................................3

Chapter 12

Chip Configuration Module (CCM)

12.1 Introduction .......................................................................................................................................1

12.2 External Signal Descriptions .............................................................................................................2

12.3 Memory Map/Register Definition .....................................................................................................2

12.4 Functional Description ......................................................................................................................5

12.5 Reset ..................................................................................................................................................6

Chapter 13

System Control Module (SCM)

13.1 Introduction .......................................................................................................................................1

13.2 Overview ...........................................................................................................................................1

13.3 Features .............................................................................................................................................1

13.4 Memory Map and Register Definition ..............................................................................................2

13.5 Register Descriptions ........................................................................................................................3

13.6 Internal Bus Arbitration ..................................................................................................................11

13.7 System Access Control Unit (SACU) .............................................................................................14

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

vi Freescale Semiconductor

Preliminary

Chapter 14

General Purpose I/O Module

14.1 Introduction .......................................................................................................................................1

14.2 Overview ...........................................................................................................................................2

14.3 Features .............................................................................................................................................3

14.4 Signal Descriptions ...........................................................................................................................3

14.5 Memory Map/Register Definition .....................................................................................................4

14.6 Register Descriptions ........................................................................................................................6

14.7 Ports Interrupts ................................................................................................................................15

Chapter 15

Interrupt Controller Module

15.1 68K/ColdFire Interrupt Architecture Overview ................................................................................1

15.2 Memory Map .....................................................................................................................................4

15.3 Register Descriptions ........................................................................................................................5

15.4 Low-Power Wakeup Operation .......................................................................................................18

Chapter 16

Edge Port Module (EPORT)

16.1 Introduction .......................................................................................................................................1

16.2 Low-Power Mode Operation .............................................................................................................2

16.3 Interrupt/GPIO Pin Descriptions .......................................................................................................2

16.4 Memory Map/Register Definition .....................................................................................................3

Chapter 17

ColdFire Flash Module (CFM)

17.1 Introduction .......................................................................................................................................1

17.2 External Signal Description ..............................................................................................................3

17.3 Memory Map and Register Definition ..............................................................................................3

17.4 Functional Description ....................................................................................................................14

Chapter 18

Fast Ethernet Controller (FEC)

18.1 Overview ...........................................................................................................................................1

18.2 Modes of Operation ...........................................................................................................................1

18.3 FEC Top-Level Functional Diagram .................................................................................................3

18.4 Functional Description ......................................................................................................................4

18.5 Programming Model .......................................................................................................................17

18.6 Buffer Descriptors ...........................................................................................................................42

Chapter 19

Ethernet Physical Transceiver (EPHY) Block Description

19.1 Introduction .......................................................................................................................................1

19.2 External Signal Descriptions .............................................................................................................3

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

Freescale Semiconductor vii

Preliminary

19.3 Memory Map and Register Descriptions ..........................................................................................5

19.4 Functional Description ....................................................................................................................21

Chapter 20

DMA Controller Module

20.1 Introduction .......................................................................................................................................1

20.2 M-bus Priority Level (MPL) .............................................................................................................4

20.3 DMA Transfer Overview ..................................................................................................................4

20.4 Memory Map/Register Definition .....................................................................................................5

20.5 Functional Description ....................................................................................................................16

Chapter 21

EzPort

21.1 Features .............................................................................................................................................1

21.2 Modes of Operation ...........................................................................................................................1

21.3 External Signal Description ..............................................................................................................2

21.4 Command Definition .........................................................................................................................3

21.5 Functional Description ......................................................................................................................7

21.6 Initialization/Application Information ..............................................................................................8

Chapter 22

Programmable Interrupt Timer Modules (PIT0–PIT1)

22.1 Introduction .......................................................................................................................................1

22.2 Memory Map/Register Definition .....................................................................................................2

22.3 Functional Description ......................................................................................................................5

Chapter 23

General Purpose Timer Module (GPT)

23.1 Introduction .......................................................................................................................................1

23.2 Features .............................................................................................................................................1

23.3 Block Diagram ..................................................................................................................................2

23.4 Low-Power Mode Operation .............................................................................................................3

23.5 Signal Description .............................................................................................................................3

23.6 Memory Map and Registers ..............................................................................................................4

23.7 Functional Description ....................................................................................................................17

23.8 Reset ................................................................................................................................................21

23.9 Interrupts .........................................................................................................................................21

Chapter 24

DMA Timers (DTIM0–DTIM3)

24.1 Introduction .......................................................................................................................................1

24.2 Memory Map/Register Definition .....................................................................................................2

24.3 Functional Description ......................................................................................................................8

24.4 Initialization/Application Information ..............................................................................................8

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

viii Freescale Semiconductor

Preliminary

Chapter 25

Queued Serial Peripheral Interface (QSPI)

25.1 Introduction .......................................................................................................................................1

25.2 External Signal Description ..............................................................................................................2

25.3 Memory Map/Register Definition .....................................................................................................3

25.4 Functional Description ....................................................................................................................10

25.5 Initialization/Application Information ............................................................................................16

Chapter 26

UART Modules

26.1 Introduction .......................................................................................................................................1

26.2 External Signal Description ..............................................................................................................3

26.3 Memory Map/Register Definition .....................................................................................................4

26.4 Functional Description ....................................................................................................................18

Chapter 27

I2C Interface

27.1 Introduction .......................................................................................................................................1

27.2 Overview ...........................................................................................................................................1

27.3 Features .............................................................................................................................................1

27.4 I2C System Configuration .................................................................................................................3

27.5 Memory Map/Register Definition .....................................................................................................7

27.6 I2C Programming Examples ............................................................................................................12

Chapter 28

Analog-to-Digital Converter (ADC)

28.1 Introduction .......................................................................................................................................1

28.2 Features .............................................................................................................................................1

28.3 Block Diagram ..................................................................................................................................1

28.4 Functional Description ......................................................................................................................2

28.5 Register Definitions .........................................................................................................................18

Chapter 29

Pulse Width Modulation (PWM) Module

29.1 Introduction .......................................................................................................................................1

29.2 Memory Map/Register Definition .....................................................................................................2

29.3 Functional Description ....................................................................................................................12

Chapter 30

FlexCAN

30.1 Introduction .......................................................................................................................................1

30.2 External Signal Description ..............................................................................................................5

30.3 Memory Map/Register Definition .....................................................................................................5

30.4 Functional Overview .......................................................................................................................20

30.5 FlexCAN Initialization Sequence ....................................................................................................28

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

Freescale Semiconductor ix

Preliminary

Chapter 31

Debug Module

31.1 Introduction .......................................................................................................................................1

31.2 External Signal Description ..............................................................................................................2

31.3 Real-Time Trace Support ..................................................................................................................3

31.4 Memory Map/Register Definition .....................................................................................................6

31.5 Background Debug Mode (BDM) ...................................................................................................17

31.6 Real-Time Debug Support ...............................................................................................................37

31.7 Processor Status, DDATA Definition ..............................................................................................40

31.8 Freescale-Recommended BDM Pinout ...........................................................................................44

Chapter 32

IEEE 1149.1 Test Access Port (JTAG)

32.1 Introduction .......................................................................................................................................1

32.2 External Signal Description ..............................................................................................................2

32.3 Memory Map/Register Definition .....................................................................................................4

32.4 Functional Description ......................................................................................................................6

32.5 Initialization/Application Information ............................................................................................10

Appendix A

MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 0

xFreescale Semiconductor

Preliminary

Dieses Handbuch passt für folgende Modelle

Inhaltsverzeichnis

Andere NXP Semiconductors Mikrocontroller Handbücher

NXP Semiconductors

NXP Semiconductors freescale K30 Series Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors LPC29 Series Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MPC5606S Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors LPC1114 Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MPC5777C Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors A71CLARD-BA Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors SLN-LOCAL2-IOT Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors NTAG I2C plus Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MC9S12ZVMB-Family Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MPC57xx Montage- und Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors AN11268 Fehlerbehebungshandbuch

NXP Semiconductors

NXP Semiconductors TWR-KL25Z Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors i.MX 8M Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MPC5746R Leitfaden

NXP Semiconductors

NXP Semiconductors UM10883 Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors KL25 Series Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MPC574xR Series Montage- und Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors QN908 series Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors LPC2880 Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors Freescale Flexis MCF51MM256 Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors LPC1102 Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors HCS12 Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors MRF101AN Bedienungsanleitung

NXP Semiconductors

NXP Semiconductors LPC546 Series Bedienungsanleitung

Beliebte Mikrocontroller Handbücher anderer Marken

AMS

AMS AS7261 Demo Kit Bedienungsanleitung

Novatek

Novatek NT6861 Bedienungsanleitung

Espressif Systems

Espressif Systems ESP8266 SDK Einrichtungshandbuch

Nuvoton

Nuvoton ISD61S00 ChipCorder Leitfaden

STMicrolectronics

STMicrolectronics ST7 Assembler Linker Bedienungsanleitung

Texas Instruments

Texas Instruments Chipcon CC2420DK Bedienungsanleitung

Lantronix

Lantronix Intrinsyc Open-Q 865XR SOM Bedienungsanleitung

NEC

NEC 78GK0S/K 1+ Series Montage- und Bedienungsanleitung

Mikroe

Mikroe SEMITECH N-PLC Click Montage- und Bedienungsanleitung

Intel

Intel Agilex Bedienungsanleitung

Cypress

Cypress CY4607 HX2VL Bedienungsanleitung

DIGITAL-LOGIC

DIGITAL-LOGIC MICROSPACE Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320F2837 D Series Bedienungsanleitung

CYPRES

CYPRES CY14NVSRAMKIT-001 Bedienungsanleitung

Texas Instruments

Texas Instruments INA-DUAL-2AMP-EVM Bedienungsanleitung

Espressif Systems

Espressif Systems ESP8266EX Betriebsanleitung

Abov

Abov AC33M8128L Bedienungsanleitung

Laird

Laird BL654PA Bedienungsanleitung